Verific Design Automation Adds UPF 2.0 Support to Growing Parser Platform

Available Standalone or Add-on to Existing SystemVerilog, VHDL Installations

(firmenpresse) - ALAMEDA, CA -- (Marketwire) -- 02/02/12 -- Verific Design Automation, supplier of industry-standard, IEEE-compliant SystemVerilog and VHDL front-end solutions, today announced immediate availability of a parser for the IEEE 1801-2009 Standard for Design and Verification of Low-Power Integrated Circuits.

Also known as Unified Power Format 2.0 (UPF 2.0), it was developed by standards organization Accellera and carries the support of multiple electronic design automation (EDA) vendors.

"We are happy to announce that we are having a fruitful collaboration with Verific on the UPF support of our products," remarks Chouki Aktouf, CEO at DeFacTo Technologies. "As we expected from previous collaborative experiences with Verific, our R&D team is having real positive interactions and getting outstanding support from Verific's R&D team."

Since its founding in 1999, Verific's software has served as the front end to a wide range of EDA and FPGA tools for analysis, simulation, verification, synthesis, emulation and test of register transfer level (RTL) designs. The UPF parser is part of Verific's Parser Platform and is available standalone or as an add-on to existing SystemVerilog and VHDL installations. As with all Verific's products, it is licensed as C++ source code.

Verific Design Automation, with offices in Alameda, Calif., and Kolkata, India, provides de facto standard front-end solutions supporting SystemVerilog, Verilog and VHDL design. Verific's software is used worldwide by the EDA and semiconductor community in synthesis, simulation, formal verification, emulation, debugging, virtual prototyping, and design-for-test applications, which combined have shipped more than 40,000 copies. Corporate headquarters is located at: 1516 Oak Street, Suite 115, Alameda, Calif. 94501. Telephone: (510) 522-1555. Facsimile number: (510) 522-1553. Email: . Website: .

Verific Design Automation acknowledges trademarks or registered trademarks of other organizations for their respective products and services.

For more information, contact:
Nanette Collins
Public Relations for Verific
(617) 437-1822

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Datum: 02.02.2012 - 16:00 Uhr
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