Cadence Physical Verification System Qualified for TSMC 28nm, 20nm Process
(firmenpresse) - SAN FRANCISCO, CA -- (Marketwire) -- 06/04/12 -- -- Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that TSMC has qualified the Cadence® (PVS) for 28-nanometer design signoff, and completed Phase I certification for TSMC's 20-nanometer process.
Designers can request a PVS 20-nanometer technology file directly from TSMC for early design exploration, and access TSMC-Online to download 28-nanometer technology files for signoff.
Cadence PVS supports 20-nanometer technology where innovative patterning technology is used. The dedicated PVS engine improves color loop detection accuracy, reduces false errors and provides intuitive error reporting. The Cadence technology also ensures mask decomposition feasibility.
Cadence PVS is integrated with Cadence and platforms to help designers find and fix errors early in the implementation stage. Integration with Virtuoso includes real-time, in-design design rule checking (DRC) verification; real-time 20-nanometer DPT color loop detection; and incremental DRC correction and verification.
"Our work with TSMC helps ensure that design teams will have advanced implementation and signoff technologies available for SoC design and manufacturing," said Chi-Ping Hsu, senior vice president of research & development, Silicon Realization Group. "TSMC's qualification of Cadence PVS at 28 nanometers and early certification for 20 nanometers represents an important joint commitment to deliver convergent verification capabilities for today's complex mixed-signal SoCs."
"PVS has successfully completed TSMC's qualification process for 28-nanometer design signoff," said Suk Lee, TSMC senior director, Design Infrastructure Marketing Division. "We worked closely with Cadence to achieve these results, including technical collaboration on 20-nanometer advanced technology."
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at .
Cadence, Virtuoso, Encounter and the Cadence logo are registered trademarks of Cadence Design Systems, Inc. in the United States and other countries. All other trademarks are the property of their respective owners.
For more information, please contact:
Dean Solov
Cadence Design Systems, Inc.
408-944-7226
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Datum: 04.06.2012 - 12:00 Uhr
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