STMicroelectronics, ARM and Cadence Improve Tool and Model Interoperability with Three Joint Contributions to Accellera Systems Initiative
(Thomson Reuters ONE) -
Proposed Interfaces for Interrupt Modeling, Register Introspection and Modeling
of Memory Maps Enable Third-Party Model and Tools Markets
Geneva, Switzerland, Cambridge, UK, San Jose, California, July 29, 2013 --
STMicroelectronics, ARM and Cadence Design Systems, Inc. today announced three
new contributions to the SystemC Language Working Group of the Accellera Systems
Initiative. This collaboration will further increase model and tool
interoperability for electronic system-level (ESL) design at the transaction-
level.
The joint work includes new interfaces for interrupt modeling, which allow
seamless integration of models from different companies; application programming
interfaces for register introspection that enable tool interoperability to
seamlessly display and update register values; and new approaches for memory-map
modeling that improve users' productivity during debugging of virtual platforms
for hardware/software multicore systems. The contributions consist of fully
working application programming interfaces (API) and implementations, as well as
documentation and examples, released under an Apache 2.0 open-source license and
available online at http://forums.accellera.org/files/.
"These new interfaces are crucial to strengthening the ESL ecosystem. As a step
towards interoperability driven by ST, ARM and Cadence, these proposed standards
dramatically reduce risks and efforts associated with the integration of virtual
prototypes. Eliminating the need for adapters will increase virtual prototype
simulation performances, enable sooner and faster hardware-software integration,
and therefore improve product time-to-market," said Philippe Magarshack,
executive vice president, Design Enablement & Services, STMicroelectronics.
"Cadence has worked closely with ST, ARM and other partners to develop these
open standards proposals," said Stan Krolikoski, distinguished engineer,
Cadence. "Adoption of these proposed standard interfaces in virtual prototyping
solutions will enable the expansion of the ESL ecosystem and provide added value
through interoperability to users."
"The Accellera TLM 2 standard has been very important in enabling an ecosystem
of models that can be integrated into SystemC virtual prototypes," said John
Goodenough, vice president of Design Technology and Automation, ARM. "By
addressing a key gap in the model-to-model interface and by enhancing tool
integration, these proposed contributions further help in ensuring virtual
prototypes can be predictably and consistently integrated."
"With the growing adoption of virtual prototypes for early software development,
it is important to continue to simplify their creation while adding value for
users," said Yatin Trivedi, director, standards and interoperability at
Synopsys. "As a market leader in virtual prototyping, we welcome contributions
and discussions that help to advance the Accellera SystemC TLM standard."
"We look forward to working together and collaborating in the Accellera Systems
Initiative SystemC Language Working Group to advance the needs for improved
virtual prototyping model and tool interoperability," said Shabtay Matalon, ESL
market development manager from Mentor Graphics Corporation. "The initial open
source contributions serve as a good catalyst to start the process of addressing
and refining these pressing standards challenges."
The first technical proposal addresses the need for better interoperability
among SystemC TLM (Transaction Level Modeling) models and proposes a standard
interface to model interrupts and wires at the Transaction Level. This will
enable seamless integration of models from different companies with standardized
memory-mapped connections, further enhancing the growth of a market for third-
party TLM models.
The second proposal defines a standard interface between models and tools to
support register introspection, enabling tools to seamlessly display and update
register values. This interface works in a mix of different user-defined
register classes to support platforms integrating heterogeneous models from
various model providers. This capability is a key enabler for integration and
debug of embedded software on pre-silicon virtual prototypes.
The third proposal introduces an approach to reconstruct system memory maps as
seen from initiators, enabling ESL tools to support hardware/software debug on
complex virtual platforms, for which understanding of the memory maps is
instrumental. It addresses the challenge that memory maps depend on the
interconnection of models and as a result each system initiator might have its
own view.
With these new contributions, ST, ARM and Cadence expect the integration of
SystemC models in virtual prototypes will be significantly improved for all
users, enabling the models' quick and efficient deployment. In addition,
standard interfaces between models and tools will extend hardware/software
integration and debug capabilities using appropriate tools.
Within the Accellera Systems Initiative, ARM, Cadence, and ST plan to work with
other companies to refine and fully standardize these proposals.
About STMicroelectronics
ST is a global leader in the semiconductor market serving customers across the
spectrum of sense and power and automotive products and embedded processing
solutions. From energy management and savings to trust and data security, from
healthcare and wellness to smart consumer devices, in the home, car and office,
at work and at play, ST is found everywhere microelectronics make a positive and
innovative contribution to people's life. By getting more from technology to get
more from life, ST stands for life.augmented.
In 2012, the company's net revenues were $8.49 billion. Further information on
ST can be found at www.st.com.
About ARM
ARM designs the technology that is at the heart of advanced digital products,
from wireless, networking and consumer entertainment solutions to imaging,
automotive, security and storage devices. ARMs comprehensive product offering
includes RISC microprocessors, graphics processors, video engines, enabling
software, cell libraries, embedded memories, high-speed connectivity products,
peripherals and development tools. Combined with comprehensive design services,
training, support and maintenance, and the company's broad Partner community,
they provide a total system solution that offers a fast, reliable path to market
for leading electronics companies. Find out more about ARM at http://www.arm.com
About Cadence
Cadence enables global electronic design innovation and plays an essential role
in the creation of today's integrated circuits and electronics. Customers use
Cadence software, hardware, IP, and services to design and verify advanced
semiconductors, consumer electronics, networking and telecommunications
equipment, and computer systems. The company is headquartered in San Jose,
Calif., with sales offices, design centers, and research facilities around the
world to serve the global electronics industry. More information about the
company, its products, and services is available at www.cadence.com. Follow us
on Facebook, Twitter, Flicker and Google+.
For Press Information Contact:
STMicroelectronics
Michael Markowitz
Director Technical Media Relations
michael.markowitz(at)st.com
+1 781 591 0354
ARM
Phil Hughes
Senior PR Manager
phil.hughes(at)arm.com
+1 512-694-7382
Cadence
Dean Solov
Senior PR Manager
dsolov(at)cadence.com
Cadence and the Cadence logo are registered trademarks of Cadence Design
Systems, Inc. in the United States and other countries.
ST ARM Cadence for Accellera Systems:
http://hugin.info/152740/R/1719374/572231.pdf
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Source: STMicroelectronics via Thomson Reuters ONE
[HUG#1719374]
Unternehmensinformation / Kurzprofil:
Datum: 29.07.2013 - 15:00 Uhr
Sprache: Deutsch
News-ID 282561
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Town:
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