Cadence Demonstrates Proven Design and Verification IP at Intel Developer Forum

(firmenpresse) - SAN JOSE, CA -- (Marketwire) -- 09/12/11 -- Cadence Design Systems, Inc. (NASDAQ: CDNS)
Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, showcases its integration-ready, proven high-speed interface and memory IP solutions, and verification IP with the industry's broadest support of protocols and memory models, including emerging standards, at the 2011 Intel Developer Forum.
Cadence will highlight design and verification IP (VIP) that enable the successful integration of high-speed interface and memory IP into ASICs and SoCs.
Specifically, the company will highlight design IP for DDR4, Wide I/O, NAND flash, PCI Express 3.0 and multi-gigabit Ethernet.
Cadence will also highlight its extensive VIP Catalog, which provides proven verification IP for more than 30 complex protocols and over 15.000 memory device configurations, including emerging standards and open support of all major simulators and use models from IP and SoC to system level. Cadence will present an analysis of the verification challenges posed by PCI Express Gen 3 and SuperSpeed USB, and the optimal use of verification IP in SoC and system-level verification.
The company's live demonstrations will include:
A high-performance, dual-mode, 128-bit data-path, x8 PCI Express 3.0 controller IP configuration implemented in a PMC-Sierra 6Gb/s SAS Tachyon protocol controller.
Advanced low-density parity check (LDPC) error correction IP technology suitable for high-performance Flash applications such as enterprise SSD.
Tuesday, Sept. 13, 5-7 p.m.
Wednesday, Sept. 14, 11 a.m. - 1 p.m., 4 - 7 p.m.
Thursday, Sept. 15, 11 a.m. - 2 p.m.
The Intel Developer Forum is being held at Moscone Center in San Francisco, CA. Demonstrations will take place in the Cadence Booth #422.
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at .
Joany Draeger
Cadence Design Systems
408-428-5220
Themen in dieser Pressemitteilung:
Unternehmensinformation / Kurzprofil:
Bereitgestellt von Benutzer: MARKET WIRE
Datum: 12.09.2011 - 12:00 Uhr
Sprache: Deutsch
News-ID 64625
Anzahl Zeichen: 0
contact information:
Town:
SAN JOSE, CA
Kategorie:
Networking
Diese Pressemitteilung wurde bisher 162 mal aufgerufen.
Die Pressemitteilung mit dem Titel:
"Cadence Demonstrates Proven Design and Verification IP at Intel Developer Forum"
steht unter der journalistisch-redaktionellen Verantwortung von
Cadence Design Systems, Inc. (Nachricht senden)
Beachten Sie bitte die weiteren Informationen zum Haftungsauschluß (gemäß TMG - TeleMedianGesetz) und dem Datenschutz (gemäß der DSGVO).





