New Convey MX(TM) Demonstrates Leading Power/Performance on Graph 500 Benchmark

New Convey MX(TM) Demonstrates Leading Power/Performance on Graph 500 Benchmark

ID: 203064

Convey Hybrid-Core Systems Dominate Single-Node Performance With Top Five Entries


(firmenpresse) - SALT LAKE CITY, UT -- (Marketwire) -- 11/13/12 -- SC12 Booth #2001 -- Convey Computer™ Corporation announced today results for the November 2012 Graph 500(1) benchmark. Convey systems dominated power/performance with the five fastest entries (sorted by GTEPS) for single-node systems. High performance in a single-node, power-efficient package allows customers to install a highly efficient, affordable system for their data-intensive applications.

Convey's new MX™ system earned the number one position for single-node systems with an impressive result of 14.6 GTEPS (billion edges per second) on a problem of scale 29. Convey credits the dramatic performance to the company's new graph instruction set architecture (ISA). The ISA implemented on the hybrid-core systems enables massive levels of parallelism, with over 32,000 threads of execution.

Convey HC-2ex systems capture the next four single-node entries, clocking in at 11.4 GTEPS on a problem of scale 27. This kind of performance is important in efficiently executing high-performance analytics applications in areas such as genomics, graph analytics, social network analytics, fraud detection, and security.

"Hybrid-core platforms deliver the best performance per watt on this benchmark, an important benefit because power consumption continues to be a challenge for large data centers," explained Bruce Toal, CEO of Convey. "These results demonstrate that both the MX Series and the HC Series excel at executing extremely large, hard to partition problems."

The MX Series introduces architectural features critical to data-intensive computing. To achieve high degrees of parallelism, the system features highly threaded reconfigurable compute elements, hardware support for efficient thread scheduling, and in-memory arithmetic operations. The development tools are based on OpenMP, the most pervasive parallel programming model in computing. As with all Convey systems, the MX Series supports an industry-standard Linux ecosystem, including compilers and support for OpenMP.





"The Graph 500 benchmark is all about finding relationships between data," explains Dan Olds of the Gabriel Consulting Group (GCG). "Complex analytics problems require a smarter approach to efficiently discover and analyze these relationships. Convey's ranking shows that their heterogeneous approach better manages the unstructured, irregular data found in many high-performance analytics problems."

Convey's groundbreaking hybrid-core computing architecture tightly integrates advanced computer architecture and compiler technology with commercial, off-the-shelf hardware -- namely Intel® Xeon® processors and Xilinx® Field Programmable Gate Arrays (FPGAs). The systems help customers substantially increase performance over industry standard servers while reducing energy costs associated with high-performance computing.

Convey systems break power, performance and programmability barriers with the world's first hybrid-core computer -- a system that marries the low cost and simple programming model of a commodity system with the performance of a customized hardware architecture. Using the Convey hybrid-core systems, customers worldwide in industries such as life sciences, research, big data, and the government/military are enjoying order of magnitude performance increases.

At SC12, please visit Convey in booth #2001 or contact Bob Masson, Convey's marketing director, at 720-352-5157 (mobile) or email .

All trademarks are the property of their respective owner. ™ and ® denote registered trademarks in the United States and other countries.

(1)



Bob Masson
Convey
marketing director
720-352-5157

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Bereitgestellt von Benutzer: MARKETWIRE
Datum: 13.11.2012 - 21:48 Uhr
Sprache: Deutsch
News-ID 203064
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