Media Alert: Cadence to Showcase Comprehensive PCI Express IP and Verification Solutions at PCI-SIG 2013
(firmenpresse) - SAN JOSE, CA -- (Marketwired) -- 06/20/13 -- Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced its participation at , an annual conference that provides comprehensive training on all aspects of the PCI (peripheral component interconnect) standard.
Visitors to the Cadence booth (#9) can participate in the following demonstrations:
Low-power PCIe controller and PHY
Mobile PCIe controller and MIPI M-PHY
PCIe with TripleCheck IP Validator
Chip-package-board design and analysis
Cadence will deliver papers at two conference sessions:
"Testing and Verification of NVMe PCIe devices" - Moshik Ruben (10:30-11:30 am on Tuesday, June 25)
"MPCIe implementation case study" - Martin James (3:30 - 4:30 pm on Tuesday, June 25)
June 25-26, 2013
Santa Clara Convention Center
5001 Great America Parkway
Santa Clara, CA 95054
For more information, please contact:
Dean Solov
Cadence Design Systems, Inc.
408-944-7226
Themen in dieser Pressemitteilung:
Unternehmensinformation / Kurzprofil:
Datum: 20.06.2013 - 12:00 Uhr
Sprache: Deutsch
News-ID 271664
Anzahl Zeichen: 0
contact information:
Town:
SAN JOSE, CA
Kategorie:
Networking
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"Media Alert: Cadence to Showcase Comprehensive PCI Express IP and Verification Solutions at PCI-SIG 2013"
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